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| TPD7101F TOSHIBA Intelligent Power Device Silicon Monolithic Power MOS Integrated Circuit TPD7101F 2 channel High-Side N-ch Power MOSFET Gate Driver The TPD7101F is a 2 channel high-side N-ch power MOSFET gate driver. This IC contains a power MOSFET driver and power MOSFET protective and diagnostic functions, allowing easy configuration of a high-side switch for large-current applications. Features The large-current charge pump allows for fast switching Power MOSFET protective and diagnostic functions are built-in. Protective functions: Overvoltage (internal device protection), overcurrent protection, VDD voltage drop detection * Overvoltage is internally limited. No detection or shutdown functions are included. Diagnostic functions: Overcurrent The level of overcurrent detection can set by external resistor. Package: SSOP-24 (300 mil) with embossed-tape packing Due to its MOS structure, this product is sensitive to static electricity. Handle with care. Weight: 0.29g(typ.) Pin Assignment Marking Lot No. A dot indicates lead (Pb)-free package or lead (Pb)-free finish. TPD7101F Part No. (or abbreviation code) 1 2006-10-31 TPD7101F Block Diagram 2 2006-10-31 TPD7101F Pin Description Pin No. 1 2 3 4 5 6 7 Symbol CP2 - CP 1- CP1 + CP2+ CPV+ N.C. VGS1 Pin Description Negative side connecting pin for the charge pump's second capacitor Negative side connecting pin for the charge pump's first capacitor Positive side connecting pin for the charge pump's first capacitor Positive side connecting pin for the charge pump's second capacitor Positive side connecting pin for the charge pump's third capacitor: Although about three times the VDD voltage is generated, it is limited to about 28 V by a voltage clamping circuit. External power MOSFET gate drive pin for ch1: This pin controls the external power MOSFET. Also, when overcurrent flows in the external power MOSFET, it shuts down the gate and is latched. It is unlatched by a low on-input. External power MOSFET monitor pin for ch1: Overcurrent is detected by comparing the difference between this and the VDD2 pin with the reference voltage. External power MOSFET gate drive pin for ch2: This pin controls the external power MOSFET. Also, when overcurrent flows in the external power MOSFET, it shuts down the gate and is latched. It is unlatched by a low on input. External power MOSFET monitor pin for ch2: Overcurrent is detected by comparing the difference between this and the VDD2 pin with the reference voltage. Ground pin : shared internally with pin 12. Shared internally with pin 11. Input pin for ch2 (active high) : This pin has a pull-down resistor (100 k typ.), so that even when it is open-circuited, output will not turn on inadvertently. Input pin for ch1 (active high) : This pin has a pull-down resistor (100 k typ.), so that even when it is open-circuited, output will not turn on inadvertently. Diagnostic output pin for ch2 (N-ch open-drain): When the overcurrent condition is detected, its output goes low. Also, when overcurrent is detected, it remains latched until the next rising edge of input. Diagnostic output pin for ch2 (N-ch open-drain): By comparing the voltage between VDD2 and Vsense2 pins with the set overcurrent level, it outputs external power MOSFET on / off state. Diagnostic output pin for ch1 (N-ch open-drain): When overcurrent condition is detected, its output goes low; in this case, it also remains latched until the next rising edge of input. Diagnostic output pin for ch1 (N-ch open-drain): By comparing the voltage between VDD2 and Vsense1 pins with the set overcurrent level, it outputs external power MOSFET on / off state. Chip inhibit pin (active low): By driving this pin high, all outputs can be turned off regardless of input signals. This pin has a pull-up resistor (100 k typ.). 8 Vsense1 9 VGS2 10 11 12 13 14 15 16 17 18 19 Vsense2 GND GND IN2 IN1 DIAG2-1 DIAG2-2 DIAG1-1 DIAG1-2 ENB 3 2006-10-31 TPD7101F Pin No. Symbol Pin Description Overcurrent detection level setup pin for ch2: The voltage determined by the constant current set by the resistor connected to the Rref pin and the resistance of an external resistor connected to the RISref2 pin is referenced to detect overcurrent. Overcurrent detection level setup pin for ch1: The voltage determined by the constant current set by the resistor connected to the Rref pin and the resistance of an external resistor connected to the RISref1 pin is referenced to detect overcurrent. Resistor connection pin: This resistor determines the constant current used for the overcurrent detection circuit. Connect 62k (recommended) between this pin and GND. External power MOSFET drain voltage detection pin. Power supply pin: the internal device is protected when overvoltage is applied. 20 RlSref2 21 RlSref1 22 23 24 Rref VDD2 VDD1 Absolute Maximum Ratings (Ta = 25C) Characteristics Power supply voltage Input voltage Diagnosis output current Power dissipation Operating temperature Storage temperature Symbol VDD VIN IDIAG PD Topr Tstg Rating 30 - 0.5 ~ 6 2 0.8 - 40 ~ 110 - 55 ~ 150 Unit V V mA W C C Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 4 2006-10-31 TPD7101F Electrical Characteristics Characteristics Operating supply voltage Supply current Input voltage (Unless otherwise specified, VDD = 8~18V, Tj = - 40 to 110C) Rating VDD IDD VIN (1) VIN (2) IIN (1) IIN (2) Pin No. VDD VDD IN1, IN2 IN1, IN2 Test Condition VDD = 12 V, VIN = 0 V, CP = 0.01 F VDD = 12 V, VGS = "H" VDD = 12 V, VGS = "L" VDD = 12 V, VIN = 5 V VDD = 12 V, VIN = 0 V Min 8 3.5 -1 - 45 - 250 Typ. Max 18 10 1.5 200 1 A Unit V mA V Input current IENB (1) ENB VDD = 12 V, V =5V ENB I Output voltage ENB (2) VDD = 12 V, V ENB =0V VOH VOL VGS1 VGS2 VDD = 12 V, VIN = 5 V VDD = 12 V, VIN = 0 V VDD = 12 V, VIN = 5 V, CP = 0.01 F VDD = 12 V, VIN = 0 V, CP = 0.01 F RlSref Rref Rref = 62 k Rref = 62 k RlSref = 10 k VDD2 Vsense1 Vsense2 Rref = 62 k RlSref = 20 k Rref = 62 k RlSref = 40 k DIAG1 DIAG2 VDD = 12 V, VDIAG = 5 V VDD = 12 V, IDL = 1 mA Vsense Vsense + 15* + 19* V 0.4 Output current IOH IOL 0.1 0.1 20 1.30 0.20 0.40 0.80 A Overcurrent detection resistance setup range Constant current source setup pin voltage RlSref VRref VDS(ON)(1) 10 1.17 0.16 0.32 0.64 40 1.43 0.24 0.48 0.96 10 0.6 7.3 7.8 4.5 5 5 K V Overcurrent detection voltage VDS(ON)(2) VDS(ON)(3) V Diagnostic output current Diagnostic output voltage Power supply drop detection voltage Power supply drop detection reset voltage Undervoltage protection Switching time IDH VDL VDDUV1- VDDUV1+ VDDUV2 tON tOFF A V 6.3 6.6 6.7 7.2 VDD V VGS1 VGS2 VDD = 12V, C = 3000 pF 2 2 s *: Vsense denotes the Vsense pin voltage. The following equation is used to calculate overcurrent detection resistance (RISref): RlSref = Rref x RDS (ON) x ID / Vrref = Rref x VDS (ON) / VRref where RDS (ON) ID VDS (ON) Rref VRref : ON-resistance of external power MOSFET : drain current of external power MOSFET : ON-voltage of external power MOSFET : external resistor connected to Rref pin (used to set constant current) : Rref pin voltage 5 2006-10-31 TPD7101F Truth Table In L H L H L H L H L H L H L H ENB H H L L L L L L L L L L L L VGS L L L H L H L L L H L L L H H H H H (Note 1) H H (Note 1) L (Note 1 / Note 2) L (Note 1) H H H H H H DIAG*-1 DIAG*-2 H H H L H L H H H H H H L L Overvoltage Normal State Overcurrent Supply voltage drop Undervoltage protection Power MOSFET shorted Note 1: Since overcurrent is detected by checking the drain-to-source voltage of the power MOSFET, there is a possibility of erroneous detection of overcurrent for a while after the input is driven high but before the power MOSFET is turned on, during which interval the drain-to-source voltage is high. To prevent this erroneous detection, DIAG detection is disabled for 15 s (typ.) by a mask circuit. This masking time depends on the constant current determined by the internal capacitor and Rref. (The masking time is 15 when Rref = 62 k.) Note 2: After overcurrent is detected, DIAG remains latched until the next rising edge of input. Timing Chart 6 2006-10-31 TPD7101F Application Circuit 1 Monitoring Power MOSFET drain-source voltage TPD7101F Application Circuit 2 Monitoring voltage between shunt resistors (for detecting overcurrent with high accuracy) TPD7101F Moisture-proof Packing After the pack is opened, use the devices in a 30C, 60% RH environment, and within 48 hours. Embossed-tape packing cannot be baked. Devices so packed must be used within their allowable time limits after unpacking, as specified on the packing. Standard tape packing quantity: 2000 devices / reel (EL1) 7 2006-10-31 TPD7101F Package Dimensions SSOP24-P-300-1.00C Unit : mm Weight: 0.29g (typ.) 8 2006-10-31 TPD7101F RESTRICTIONS ON PRODUCT USE * The information contained herein is subject to change without notice. 20070701-EN * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer's own risk. * The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. * Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2006-10-31 |
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